@
CpuIdLeaf(7, 0),
Bit(0, "_ax7cx0dx_res1"),
Bit(1, "_ax7cx0dx_res2"),
Bit(2, "avx512_4vnniw"),
Bit(3, "avx512_4fmaps"),
Bit(4, "fsrm"),
Bit(5, "_ax7cx0dx_res3"),
Bit(6, "_ax7cx0dx_res4"),
Bit(7, "_ax7cx0dx_res5"),
Bit(8, "avx512_vp2inersect"),
Bit(9, "SRDBS_CTRL"),
Bit(10, "md_clear"),
Bit(11, "_ax7cx0dx_res6"),
Bit(12, "_ax7cx0dx_res7"),
Bit(13, "tsx_force_abort"),
Bit(14, "SERIALIZE"),
Bit(15, "Hybrid"),
Bit(16, "TSXLDTRK"),
Bit(17, "_ax7cx0dx_res8"),
Bit(18, "pconfig"),
Bit(19, "lbr"),
Bit(20, "cet_ibt"),
Bit(21, "_ax7cx0dx_res9"),
Bit(22, "amx_bf16"),
Bit(23, "AVX512_FP16"),
Bit(24, "amx_tile"),
Bit(25, "amx_int8"),
Bit(26, "spec_ctrl"),
Bit(27, "stibp"),
Bit(28, "L1D_FLUSH"),
Bit(29, "IA32_ARCH_CAPABILITIES"),
Bit(30, "IA32_CORE_CAPABILITIES"),
Bit(31, "ssbd")